Difference between revisions of "XilinxEVB/en"

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'''6x pushbuttons'''. Spoločný vývod spínačov, ako aj spoločný vývod R-siete vyvedený na pinovú lištu, umožňuje nadstavenie aktívnej úrovne pri stlačení tlačítka. (teda či pri stlačení polezie do CPLD L alebo H. Tlačítka nie sú úmyselne ošetrené voči zákmitom. Toto ošetrenie je možné previesť priamo v CPLD (aspoň si to myslím ;-) )
 
'''6x pushbuttons'''. Spoločný vývod spínačov, ako aj spoločný vývod R-siete vyvedený na pinovú lištu, umožňuje nadstavenie aktívnej úrovne pri stlačení tlačítka. (teda či pri stlačení polezie do CPLD L alebo H. Tlačítka nie sú úmyselne ošetrené voči zákmitom. Toto ošetrenie je možné previesť priamo v CPLD (aspoň si to myslím ;-) )
  
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'''Piezomenič''' umožňuje výrobu zvukových efektov pomocou CPLD. Jedná sa o typ bez vnútorného oscilátora, preto je nutné budenie frekvenciou. Pinová lišta umožňuje pripojiť piezomenič na vyššie napätie ako 3,3V ktoré poskytuje EVB.  
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'''Buzzer''' enables to create sound effects with the CPLD. Piezo buzzer without an internal oscillator is used. It is necessary to use a frequency signal to drive it. Pin liste enables to connect also the higher voltage than boards 3,3 V.  
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'''Oprava: paralelne k piezomeniču treba prispájkovať vybíjací rezistor (cca 1k), inak sa žiadne zvuky nekonajú. Nová verzia dosky ma už rezistor doplnený'''
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'''Correction: it is necessary to connect  a discharge resistor (cca 1k) paralell to the piezoelement. New version of the board already contains this resistor.'''
  
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Všetky periférie sú odpojiteľné pomocou DIP spínačov. Tým je umožnené v špeciálnych aplikáciach použitie I/O pinov CPLD aj na iné účely.  
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All the peripherals are disconnectable using DIP switches. This enables to use all the I/O Pins also for another special purposes.  
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Dva kontakty na každom pine CPLD (okrem napájacích) slúžia na prepojenie daného pinu CPLD s externou perifériou, alebo na pripojenie log. sondy, prípadne log. analyzátora.
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Pin contacts on each CPLD pin are used for interconnections or for logic probe or analyser connection.
  
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EVB je napájaná z externého nestabilizovaného zdroja min 5V. Interné prevádzkové napätie 3,3V je stabilizované stabilizátorom LF33CV. Odber závisí na frekvencií s akou CPLD pracuje a aktivite periférií. Filter F1 slúži na filtráciu rušenia, najmä pri napájaní EVB z lacných impulzných adaptérov. Je možné ho nahradiť prepojkami. Pri osadzovaní EVB súčiastkami je vhodné jej zahriatie, napr teplovzdušnou pištoľou. Inak rozliata zemniaca plocha veľmi účinne odvádza teplo z hrotu spájkovačky.  
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EVB is powered from the external unstabilised power supply min. 5 Voltds. Required internal power supply 3,3 V is delivered from the LF33CV stabilisator. Power consumption depends on the CPLD operational frequency and on the peripheral activities. Filter F1 is for
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Rozmery dosky: 135 x 107 mm.
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filtering disturbances, especially when powering from cheap wall adapters. It can be omitted. During the board population it is recommended pre-heating of the board e.g. hot air gun, otherwise the ground plane will drain most of soldering gun heat.  
  
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V zapojení nie sú použité žiadne nezohnatelné súčiastky. Až na CPLD sa všetky dajú kúpiť v SOS a GME. CPLD napríklad v Elbatex-e.
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Board dimensions: 135 x 107 mm.
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F1 je k dostaniu v SOS pod číslom S085401, alebo do vyhľadávača zadajte BNX.
 
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DS1 maju zasa v GME pod číslom 512-925 (zeleny); 512-905 (cerveny).
 
  
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'''Kontakt na autora:''' ICQ: 209 598 598 ; mail: sergej7490@pobox.sk
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'''Contact:''' ICQ: 209 598 598 ; mail: evb.cpld@gmail.com
  
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===Obrázky===
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===Images===
  
 
<center>
 
<center>
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<tr>
 
<tr>
 
  <td>
 
  <td>
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[[Image:XilinxDBschema.jpg|thumb|center|300px|Schéma zapojenia.]]
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[[Image:XilinxDBschema.jpg|thumb|center|300px|Schematic diagram.]]
 
  </td>
 
  </td>
 
  <td>
 
  <td>
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[[Image:XilinxDB.jpg|thumb|center|300px|Skoro hotová doska.]]
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[[Image:XilinxDB.jpg|thumb|center|300px|Partially populated board.]]
 
  </td>
 
  </td>
 
</tr>
 
</tr>
 
<tr>
 
<tr>
 
  <td>
 
  <td>
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[[Image:XilinxDB_top.jpg|thumb|center|300px|Neosadená doska zhora.]]
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[[Image:XilinxDB_top.jpg|thumb|center|300px|PCB top.]]
 
  </td>
 
  </td>
 
  <td>
 
  <td>
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[[Image:XilinxDB_bot.jpg|thumb|center|300px|Neosadená doska zdola.]]
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[[Image:XilinxDB_bot.jpg|thumb|center|300px|PCB bottom.]]
 
  </td>
 
  </td>
 
</tr>
 
</tr>
 
<tr>
 
<tr>
 
  <td>
 
  <td>
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[[Image:XilinxDB_Ctop.jpg|thumb|center|300px|Osadená doska zhora.]]
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[[Image:XilinxDB_Ctop.jpg|thumb|center|300px|Ready board top.]]
 
  </td>
 
  </td>
 
  <td>
 
  <td>
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[[Image:XilinxDB_Cbot.jpg|thumb|center|300px|Osadená doska zdola.]]
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[[Image:XilinxDB_Cbot.jpg|thumb|center|300px|Ready board bottom.]]
 
  </td>
 
  </td>
 
</tr>
 
</tr>
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===Programmer===
 
===Programmer===
  
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The board is to be programmed using the simple paralell port programmer.
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Doska sa programuje jednoduchým programátorom ovládaným cez paralelný port.
 
  
 
<center>
 
<center>
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<tr>
 
<tr>
 
  <td>
 
  <td>
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[[Image:Prog.jpg|thumb|center|300px|Programátor LPT/JTAG.]]
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[[Image:Prog.jpg|thumb|center|300px| LPT/JTAG Programmer.]]
 
</td>
 
</td>
 
</tr>
 
</tr>
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</center>
 
</center>
  
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Schéma zapojenia je na priamo na [http://www.xilinx.com/support/programr/jtag_cable.pdf stránkach Xilinxu],  
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Its schematic diagram is directly on the
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alebo napr. [http://www.embeddedtronics.com/xiprog.html tuto] aj s plošákom.
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[http://www.xilinx.com/support/programr/jtag_cable.pdf Xilinx webpage],  
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or e.g. [http://www.embeddedtronics.com/xiprog.html here] also with the PCB.
  
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== Nová verzia vývojovej dosky ==
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== Xilinx EVB - new version ==
  
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Od starej verzie sa doska odlišuje použitím väčšieho CPLD, a to XC95144XL-TQ100. Ďalšou zmenou je pridanie JTAG programátora s pripojením na LPT a rozšírenie periférií o 8 LED.  
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New version of the board uses the bigger CPLD (XC95144XL-TQ100). Also the JTAG LPT programmer is onboard
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K doske je navrhnutá redukcia umožňujúca použiť XC9572XL PC44.
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and additional 8 LEDs is available. There is also a reduction for the XC9572XL PC44 chip. Another reductions
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V prípade dostatočného záujmu budú k dispozícií aj iné redukcie.  
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are planned. Also the XC9572XL TQ100 chip can be used without problems.
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Na dosku je možné bez problémov osadiť aj XC9572XL TQ100
 
  
 
Note: Instead 74HC family also the 74AC family can be used and vice versa.
 
Note: Instead 74HC family also the 74AC family can be used and vice versa.
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* [http://www.opencores.org/ Open Cores] (processors, communications,...)
 
* [http://www.opencores.org/ Open Cores] (processors, communications,...)
  
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<!-- Please do not edit this page, edit the language-specific subpages
 
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    Prosim editujte podstranku pre prislusnu jazykovu verziu -->
 
  
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<noinclude>
 
{{Footer}}
 
{{Footer}}
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</noinclude>

Latest revision as of 20:23, 15 April 2008

Author: Juraj Michálek

Xilinx Evaluation Board

Description

The purpose of this evaluation board (EVB) is to acquire experiences with the CPLD Xilinx family XC95xxXL. This board uses XC9572XL, which contains 72 cells. Their inerconnections gives the required function.

Block diagram.

Peripheral:

6 multiplexed 7-seg LED display with power drivers enables to make a counter and other number displaying devices.

8 LEDs for differet signaling purposes, indicators of the internal states of the CPLD etc. LEDs are driven with ULN2803A transistor array with OC outputs. They can be used also for driving an external applications.

2 x non-symetrical RC oscillator using 74AC14 (U2). One of the oscillator enables frequency changing using the multiturn trimer. Both oscilator frequencies are controlled by an R and C components, according the f=1/(3RC) rule. Inhibit input can stip the oscillator (High level). Oscillator output is a cca 1:1 . Can be used as a clock source especially for "slow" applications.

2x hybrid XT oscillator, clock source for higher frequencies, especially for more precise and stable applications. Oscillator output is usually harmonic and it can be shaped to the rectangle using U1 Schmitt triggers.

6x pushbuttons. Spoločný vývod spínačov, ako aj spoločný vývod R-siete vyvedený na pinovú lištu, umožňuje nadstavenie aktívnej úrovne pri stlačení tlačítka. (teda či pri stlačení polezie do CPLD L alebo H. Tlačítka nie sú úmyselne ošetrené voči zákmitom. Toto ošetrenie je možné previesť priamo v CPLD (aspoň si to myslím ;-) )

Buzzer enables to create sound effects with the CPLD. Piezo buzzer without an internal oscillator is used. It is necessary to use a frequency signal to drive it. Pin liste enables to connect also the higher voltage than boards 3,3 V. Correction: it is necessary to connect a discharge resistor (cca 1k) paralell to the piezoelement. New version of the board already contains this resistor.

All the peripherals are disconnectable using DIP switches. This enables to use all the I/O Pins also for another special purposes. Pin contacts on each CPLD pin are used for interconnections or for logic probe or analyser connection.

EVB is powered from the external unstabilised power supply min. 5 Voltds. Required internal power supply 3,3 V is delivered from the LF33CV stabilisator. Power consumption depends on the CPLD operational frequency and on the peripheral activities. Filter F1 is for filtering disturbances, especially when powering from cheap wall adapters. It can be omitted. During the board population it is recommended pre-heating of the board e.g. hot air gun, otherwise the ground plane will drain most of soldering gun heat.

Board dimensions: 135 x 107 mm.

Contact: ICQ: 209 598 598 ; mail: evb.cpld@gmail.com

Images

Schematic diagram.
Partially populated board.
PCB top.
PCB bottom.
Ready board top.
Ready board bottom.

Programmer

The board is to be programmed using the simple paralell port programmer.

LPT/JTAG Programmer.

Its schematic diagram is directly on the Xilinx webpage, or e.g. here also with the PCB.

Xilinx EVB - new version

New version of the board uses the bigger CPLD (XC95144XL-TQ100). Also the JTAG LPT programmer is onboard and additional 8 LEDs is available. There is also a reduction for the XC9572XL PC44 chip. Another reductions are planned. Also the XC9572XL TQ100 chip can be used without problems.

Note: Instead 74HC family also the 74AC family can be used and vice versa.

3D model of the new version of the board:

EVB XC95144.

Downloads

Examples

Links


--- --- --- English: XilinxEVB/en/en Slovensky: XilinxEVB/en/sk --- --- ---
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